Combinatorial Optimization for Embedded Syst. Design

Tuesday 15 June 2010

WORKSHOP 2: Combinatorial Optimization for Embedded Syst. Design (Room 5.7)

14.15 – 15.00 Invited Talk: Iuliana Bacivarov, (topic TBD)
15.00 – 15.20 Krzysztof Kuchcinski,Graph Constraints in Embedded System Design
15.20 – 15.40 Alessio Bonfietti, Incremental Throughput Constraint for Synchronous Data-Flow Graphs
15.40 – 16.00 Giuseppe Tagliavini, A unified framework for optimal mapping of parallel applications on MPSoC platforms
16.00 – 16.30 Coffee break
16.30 – 16.50 Enrico Bini, Optimal Period Selection of a Real-Time Task Set
16.50 – 17.10 Sergiu Carpov, Memory bandwidth-constrained parallelism dimensioning for embedded many-core microprocessors
17.10 – 17.30 Zdravko Karakehayov, Optimal Clock Rate Control for Energy-Aware Embedded Systems

Back to Programme